Microelectronic elements such as semiconductor chips have been connected to circuit panels by soldering. One technique which has been utilized heretofore is referred to as xe2x80x9cflip chipxe2x80x9d bonding. In flip chip bonding, the front surface of the chip bearing the contact pads of the chip faces downwardly, towards the surface of a circuit panel having a pattern of pads matching the pattern of the contact pads on the chip. The pads on the chip are bonded to the mating pads on the substrate. In one variant of this technique, referred to as a xe2x80x9ccontrolled collapse chip connectionxe2x80x9d or xe2x80x9cC4xe2x80x9d bond, individual masses of solder are provided on the contact pads of the chip or substrate prior to assembly. In the assembly process, these masses are reflowed by bringing them to an elevated temperature sufficient to melt or partially melt the solder constituting the masses. The assembly is then cooled, leaving each contact pad on the chip connected to the corresponding contact pad on the circuit panel by a mass of solid solder. As described, for example, in Multi-Chip Module Technologies And Alternatives: The Basics, Doane and Franzon, Editors (1993), pp. 468-471, surface tension in the molten solder tends to form each solder mass into a generally barrel-shaped object having narrow neck portions at the junctures between the solder masses and the contact pads on the chip and circuit panel.
The solder bonds in such assemblies typically are subjected to thermal fatigue stress during manufacture and during use of the assembly. The electrical power dissipated within the chip and other elements of the assembly tends to heat the chip and the circuit panel, so that the temperatures of the chip and circuit panel rise and fall depending on use of the device. Processing operations during manufacturing also cause the temperature of the assembly to rise and fall. As the chip and substrate ordinarily are formed from different materials having different coefficients of thermal expansion, the chip and the circuit panel ordinarily expand and contract by different amounts. Even where the chip and circuit panel are formed from materials having the same coefficients of thermal expansion, differential expansion and contraction still can occur because the elements of the assembly tend to heat and cool at different rates. For example, the temperature of the chip typically increases more rapidly than the temperature of the circuit panel when power is first applied to the chip. Differential expansion and contraction causes the contact pads on the chip to move relative to the contact pads on the substrate, which in turn tends to strain the solder bonds. The barrel-shaped solder bonds resulting from conventional C4 bonding techniques are susceptible to failure under these conditions. In particular, the narrow necks of the solder masses interfaces with the contact pads, produce stress concentrations at highly stressed regions of the solder bonds.
As described in the aforementioned Doane and Franzon treatise, attempts have been made to alleviate these problems by changing the shapes of the solder masses so as to provide elongated solder masses having narrow sections midway between the contact pads of the chip and circuit panel. As described, for example, in Lakritz et al., U.S. Pat. No. 4,545,610 and Agarwala, et al., U.S. Pat. No. 5,130,779, elongated solder columns can be formed by using multiple solder masses stacked above one another with separate elements to maintain the chip and circuit panel at the desired spacing during the reflow process. As described in Schmidt, et al., U.S. Pat. No. 5,148,968 and Latta, U.S. Pat. No. 5,385,291, elongated solder columns can also be made by pulling the chip and circuit panel away from one another while the components are at an elevated temperature in the reflow operation. The Latta ""291 patent suggests that the step of moving the elements of the assembly be conducted under an elevated pressure applied by increasing the atmospheric pressure around the assembly which allegedly results in a different wall configuration.
Other assemblies incorporating elongated solder columns are disclosed in Flip Chip Technology 1994 Update U.S. Patents, International Interconnection Intelligence, pp. 4-2 reporting IBM Technical Disclosure Bulletin, Vol. 36, No. 1, p. 174, January 1993; in IBM Technical Disclosure Bulletin, Vol. 27, No. 8, January 1985 entitled Solder-Filled Elastomeric Spacer; and in U.S. Pat. Nos. 4,581,680 and 4,967,950.
Chip mounting procedures using elongated solder columns heretofore have suffered form considerable drawbacks. These procedures require specialized techniques and considerable care during mounting of the chip to the circuit panel. Moreover, these procedures require handling and testing of bare, unpackaged semiconductor chips. It is difficult to test such a bare chip prior to attachment of the chip to the circuit panel. Moreover, the bare chip is susceptible to damage during handling and testing.
As shown in the preferred embodiments of commonly assigned U.S. Pat. Nos. 5,148,265; 5,148,266; 5,455,390, 5,518,964 5,688,716 and 5,798,286 as well as in co-pending, commonly assigned U.S. patent applications Ser. No. 08/653,016 filed May 24, 1996; Ser. No. 08/678,808 filed Jul. 12, 1996, the disclosures of which are all incorporated by reference herein, it is desirable to provide interconnections between the contacts on a chip and external circuitry by providing a further dielectric element, commonly referred to as a xe2x80x9cinterposerxe2x80x9d or xe2x80x9cchip carrierxe2x80x9d having terminals. The dielectric element is juxtaposed with the chip and the terminals on the dielectric element are connected to the contacts on the chip, desirably by flexible leads extending between the interposer and the chip. The terminals on the dielectric element may be connected to a substrate such as a circuit panel, as by solder bonding the terminals to contact pads of the substrate. The dielectric element remains movable with respect to the chip so as to compensate for thermal expansion and contraction of the components. That is, various parts of the chip can move with respect to the dielectric element and with respect to the terminals on the dielectric element, as the components expand and contract. In a particularly preferred arrangement, a compliant dielectric layer is incorporated in the dielectric element or provided as a separate component so that the compliant layer lies between the chip and the terminals. The compliant layer may be formed from a material such as a gel, elastomer, foam or the like. The compliant layer mechanically decouples the dielectric element and terminals from the chip and facilitates movement of the dielectric element and terminals relative to the chip. The compliant layer may also permit movement of the terminals in the Z direction, towards the chip, which further facilitates testing and mounting of the assembly. Thus, differential thermal expansion and contraction of the circuit panel and chip does not cause fatigue failures of the solder bonds. In a variant of this approach, disclosed in commonly assigned PCT International Publication WO 97/40958, the disclosure of which is also incorporated by reference herein, the terminals on the interposer can be connected to the contacts of the chip by masses of a low-melting electrically conductive composition which liquefies at the temperatures attained during service. The compliant layer retains the liquid in place, so that masses of conductive liquid provide deformable connections between the chip and interposer. As further disclosed in these patents and patent applications, one or more chips may be mounted to a common dielectric element or interposer, and additional circuit elements may also be to such a dielectric element. The dielectric element may incorporate conductive traces which form interconnections between the various chips and electronic components of the assembly and which completes circuits as required.
In these techniques, the assembly of the chip and the interposer, with the terminals thereon provides a packaged chip which can be handled, tested and assembled readily. The most preferred packaged chips can be assembled to a circuit board using standard surface mount soldering and other standard techniques. The preferred embodiments according to the aforementioned commonly assigned patents and patent applications disclosing interposers also provide highly reliable assemblies. These techniques are being increasingly adopted in the electronic industry. However, it would be desirable to provide still further techniques and assemblies to provide an even greater versatility.
One aspect of the invention provides methods of making solder interconnections. A method in accordance with this aspect of the invention includes the step of providing first and second elements having confronting surfaces and having pads on the confronting surfaces arranged in pairs, each such pair including a pad on the first element and a pad on the second element as well as solder masses at at least some of the pairs, so that each such solder mass is provided in contact with both pads of the pair. The method further includes the step of moving the elements in a vertical direction away from one another while the solder masses are at a temperature above the recrystallization temperature of the solder constituting the masses. The moving step desirably is performed by introducing a fluid under pressure between the confronting surfaces to thereby move the elements away from one another and stretch the solder masses. The moving step can be performed in whole or in part while the solder masses are at a temperature above the recrystallization temperature but below the solidus temperature of the solder masses; or while the solder masses are in a partially liquid state, at a temperature between the solidus and liquidus temperatures of the solder masses; or while the solder masses are at a temperature above the liquidus temperature. As used in this disclosure, the term xe2x80x9csolidus temperaturexe2x80x9d means the highest temperature at which the solder, in equilibrium, is entirely solid, whereas the term xe2x80x9cliquidus temperaturexe2x80x9d means the lowest temperature at which the solder in equilibrium is entirely liquid.
In a particularly preferred method according to this aspect of the invention, the first element includes a dielectric packaging structure having an interior surface facing toward the second element and having an exterior surface. The pads of the first element are disposed on the interior surface. The packaging structure further includes terminals exposed at the exterior surface which are electrically connected to the pads on the interior surface. Desirably, the second element includes one semiconductor chip or a plurality of semiconductor chips. Preferred methods according to these embodiments of the invention, thus can provide packaged microelectronic elements, such as packaged semiconductor chips, incorporating the microelectronic element and an interposer having terminals connected to the microelectronic element by elongated solder columns. Such an assembly can be utilized by bonding the terminals of the interposer to a circuit panel or other substrate. The assembly can be handled and mounted using standard techniques. The elongated solder columns provide enhanced resistance to stress as compared to standard flip-chip mountings, but without the need for special techniques during assembly of the chip to the circuit panel.
Methods according to this aspect of the invention desirably include the step of injecting a liquid material around the solder masses and curing the liquid to form dielectric encapsulant, desirably a compliant encapsulant, surrounding the elongated solder columns. For example, the fluid used to force the elements away from one another may be a liquid, uncured encapsulant. Where the second element includes a plurality of chips, the method may include the step of separating the chips from one another after the step of moving the elements away from one another, and desirably after cooling the solder masses to below their solidus temperature. The dielectric packaging structure or interposer may be severed in this separating step. The separating step forms a plurality of unit assemblies, each of which includes one or more of the chips and a portion of the packaging structure or interposer associated with such chip or chips. For example, the method may be performed at a wafer level, with a large interposer covering the entire wafer. The interposer and the wafer may be severed to provide unit assemblies. The first element used in the process may include a reinforcing element engaged with the first element. This approach is particularly useful where the first element is a flexible dielectric element such as a packaging structure. For example, the packaging structure may be held taut on a frame extending around the periphery of the packaging structure. Alternatively or additionally, the reinforcing element may extend along the exterior of the packaging structure. The method desired further includes the steps of at least partially removing the reinforcing structure after the moving step. The reinforcing structure holds the pads of the packaging structure precisely in position and facilitates registration of the packaging structure with the pads of the microelectronic elements. This is particularly useful where the process is performed on a wafer level.
A further aspect of the present invention provides methods of making solder connections which include the steps of providing first and second elements having confronting surfaces and having pads on the confronting surfaces arranged in pairs, each pair including a pad on one element and a pad on the other element, and providing solder masses at at least some of the pairs so that each such solder mass is in contact with both pads of the pair. Methods according to this aspect of the invention also include the step of moving the elements away from one another through a preselected vertical movement so as to stretch the solder masses while the solder masses are at a temperature above the recrystallization temperature of the solder but below its recrystallization temperature. In methods according to this aspect of the invention, the solder masses incorporate columnar inclusions, which are present when the solder masses are stretched. As used in this disclosure, the term xe2x80x9ccolumnar inclusionxe2x80x9d refers to a separate phase within the solder present as elongated droplets or particles. For example, the moving step may be performed at least in part at a temperature between the solidus and liquidus temperatures of the solder masses, and the columnar inclusions may be present as solid inclusions within the partially molten solder masses during the moving step. Such columnar inclusions will be formed, for example, by lead-tin alloy solders containing about one percent to about five percent copper by weight. As the solder masses are stretched during the moving step, the columnar inclusions tend to orient preferentially in the direction of movement, and hence orient along the long axis of the elongated solder masses resulting from the moving step. Columnar inclusions further enhance resistance of the elongated solder masses to fatigue failure.
A method according to a further aspect of the invention includes the step of providing first and second elements with pairs of pads as aforesaid, and with solder masses at at least some pairs such that each solder mass is in contact with both pads of the associated pad. Methods according to this aspect of the invention include the further step of moving the elements relative to one another, while the solder masses are at a temperature above the recrystallization temperature of the solder, so that the elements move relative to one another in a horizontal direction parallel to the confronting surfaces so as to deform the solder masses in the horizontal direction. Desirably, the method also includes the step of moving the elements away from one another in a vertical direction, transverse to the confronting surfaces while the solder masses are at a temperature above the recrystallization temperature. Most preferably, the vertical and horizontal movements are performed simultaneously. The pads constituting each pair may be aligned one above the other prior to the horizontal movement and may be offset from one another in the horizontal direction after the horizontal movement step. Methods according to this aspect of the invention yield assemblies incorporating elongated solder masses having directions of elongation which are inclined to the confronting surfaces of the components. The sloping, elongated solder masses provide enhanced flexibility in the assembly.
In the most preferred processes according to the invention, the foregoing aspects of the invention are combined in a single assembly process.
Yet another aspect of the invention provides packaged microelectronic elements such as semiconductor chips. A packaged microelectronic element according to this aspect of the invention includes a microelectronic element such as a semiconductor chip together with an interposer overlying the contact-bearing surface of the chip. The interposer desirably is a flexible sheetlike element and includes an interior surface facing toward the chip and pads on the interior surface. The interposer further includes terminals exposed for connection to external components. The terminals may be exposed at an exterior surface of the interposer, facing away from the chip. The terminals are electrically connected to the pads over the interposer. The pads of the interposer in turn are electrically connected to the pads of the microelectronic element to a semiconductor chip by elongated solder masses extending between the pads of the interposer and the pads of the micro electronic element chip. Most desirably, the assembly includes a compliant dielectric layer such as a gel, foam or elastomer surrounding the elongated solder masses. Such an assembly can be handled and the amount of using standard surface mounting techniques, as by solder bonding the terminals of the interposer to a circuit panel or other substrate. After assembly, flexure of the elongated solder masses provides compensation for differential thermal expansion, and relieves stress on the bonds between the terminals and the circuit panel.
Yet another aspect of the invention provides a soldered assembly, such as a packaged microelectronic element or other assembly which includes first and second elements with pairs of pads thereon and which includes solder masses, each such solder mass extending between the pads of one such pair. The solder masses incorporate columnar inclusions. Most preferably, the columnar inclusions in at least some of the solder masses are oriented preferentially in the direction between the pads of the associated pair. That is, the lengthwise direction of the columnar inclusions is preferentially oriented in alignment with the direction between the pads. Yet a further aspect of the invention provides solder assemblies with elongated solder masses extending between pairs of pads on opposing surfaces of two elements. The pads of each pair are spaced apart from one another in a vertical direction normal to the confronting surfaces of the element and are offset from one another in a horizontal direction parallel to the confronting surfaces so that the elongated solder masses extend oblique to the vertical and horizontal directions, and oblique to the surfaces of the opposing elements. Most desirably, the elongated solder masses extend generally parallel to one another. The oblique orientation of the elongated solder masses provides enhanced flexibility and fatigue resistance. Here again, the various aspects of the invention can be combined with one another to form an assembly, such as a packaged chip, which includes all of the features discussed above with reference to the assembly.
These and other objects, features and advantages of the present invention will be more readily apparent from the detailed description of the preferred embodiments set forth below, taken in conjunction with the accompanying drawings.